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As AI inflates gadget prices, Japan’s Rapidus races to add advanced chip supply

A memory crunch driven by AI data centers is raising consumer prices, and a Japanese newcomer is betting it can help widen a bottlenecked supply chain

JStories Editorial Team by JStories Editorial Team
07/31/2026
in Artificial Intelligence, AI, News
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PROBLEM: AI accelerators have absorbed the world’s supply of leading-edge logic chips, with the most advanced nodes and packaging lines booked out for years and consumer processors losing wafer slots to data centers.
POTENTIAL SOLUTION: Rapidus, a state-backed chipmaker in Hokkaido, is running a 2nm pilot line and advanced packaging aimed at adding a new source of the advanced chips that AI and consumer devices both depend on.


The chips that do the computing are running out, and so is the ability to assemble them. TSMC, which handles most of the world’s advanced chipmaking, told shareholders in June that it will not be able to meet AI demand for years. A customer ordering 2 and 3-nanometer chips from TSMC’s most advanced production lines, and its capacity is already committed into 2027. Its packaging lines are booked solid as well. Packaging is the step that joins a processor to its memory in a single unit, and every high-end Nvidia and AMD accelerator has to pass through it.

This reaches ordinary shoppers because AI chips and laptop chips are made in the same factories, on the same lines. The 3nm line that produces Apple’s Mac and iPhone processors, is increasingly going to AI parts instead. Intel has shifted production away from consumer processors toward server chips. TSMC has told its largest customers to expect price rises of 5 to 10 percent. A separate shortage in memory chips, the one behind Apple’s June price rises on Macs and iPads, Microsoft’s August Xbox increase and Nintendo’s on the Switch 2, comes through different suppliers, but has the same root cause. IDC expects global PC shipments to fall 11.3 percent in 2026.

Mockup of Rapidus’ cutting-edge semi-conductor manufacturing hub named IIM-1.   Source: Rapidus website.

A new source of supply, from the north

Roughly 900 kilometers north of Tokyo, in Chitose, Hokkaido, a four-year-old company is trying to widen that bottleneck. Rapidus, backed by the Japanese government and major domestic firms, has been running a pilot line for 2nm logic chips since April 2025 and aims to begin mass production in 2027. In July 2025 it confirmed working 2nm transistors on its line, a technical milestone reached with technology transferred from IBM.

Rapidus is also building out advanced packaging, the increasingly critical step of stitching chip pieces together, which has become its own supply constraint for AI hardware. In April 2026 it opened a back-end pilot line in Chitose and said a panel-level approach using large 600mm-square panels could raise AI-chip production efficiency more than tenfold versus conventional methods. On the same day it opened an Analysis Center beside its main foundry to run the physical, chemical, electrical, and reliability testing that largely determines yield, the make-or-break metric for moving from a pilot line to mass production.

EUV lithography system used to produce 2nm chips.   Source: Rapidus YouTube channel

Why it matters, and the limits

For a global reader, Japan’s push is one attempt to loosen a supply chain that runs largely through a single company. Rapidus is positioning speed as its edge, processing wafers one at a time rather than in large batches to shorten turnaround, and targeting a wafer price of ¥3 to 3.5 million, around $18,500 to $21,600.

The caveats are real. Rapidus remains at pilot stage and still has to prove it can reach stable, high-yield production at a level where only a few companies operate. More than 60 companies are in talks over 2nm capacity, but none has signed a volume agreement, and the entire plan rests on one factory with no fallback site. Its packaging efficiency claims are the company’s own, not independently verified, and its glass version of the connector plate is not targeted for mass production until 2028.

Scale is the harder limit. Rapidus plans to start at 6,000 wafers per month and reach about 25,000 within a year, a fraction of what the leading foundry already runs at the same level, and TSMC will have roughly two years of volume experience with it by the time Rapidus arrives. Japan has committed about ¥2.35 trillion in public development support, with a further equity injection in June pushing projected backing above ¥3 trillion, a bet whose payoff is not yet proven.

Whether Rapidus becomes a genuine third force in advanced logic or a costly experiment, its progress is a test of how quickly a determined newcomer can enter one of the world’s hardest manufacturing races.

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JStories Editorial Team

JStories Editorial Team

The JStories Editorial Team is a group of experienced, multilingual and multicultural journalists based in Tokyo, many of whom have reported for major international news organizations such as Reuters. Drawing on decades of combined experience across television, wire, and print journalism, the team produces solutions-focused stories that meet global broadcast and editorial standards. The team is led by Toshi Maeda, a former producer and correspondent for Reuters TV. Earlier in his career, Maeda worked as a reporter at The Japan Times in Japan, The Associated Press in San Francisco, Newsday in New York, and The Desert Sun in Palm Springs, California. He has also taught journalism at Komazawa University's Faculty of Global Media Studies.

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